DMA HAL module driver. More...

Collaboration diagram for DMA:

Modules
	DMA Exported Types
	DMA Exported Types.

	DMA Exported Constants
	DMA Exported constants.

	DMA Exported Functions
	DMA Exported functions.

	DMA Private Constants
	DMA private defines and constants.

	DMA Private Macros
	DMA private macros.

	DMA Private Functions
	DMA private functions.

Macros
#define	__HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
	Reset DMA handle state. More...

#define	__HAL_DMA_GET_FS(__HANDLE__) (((__HANDLE__)->Instance->FCR & (DMA_SxFCR_FS)))
	Return the current DMA Stream FIFO filled level. More...

#define	__HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= DMA_SxCR_EN)
	Enable the specified DMA Stream. More...

#define	__HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA_SxCR_EN)
	Disable the specified DMA Stream. More...

#define	__HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__)
	Return the current DMA Stream transfer complete flag. More...

#define	__HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)
	Return the current DMA Stream half transfer complete flag. More...

#define	__HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)
	Return the current DMA Stream transfer error flag. More...

#define	__HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)
	Return the current DMA Stream FIFO error flag. More...

#define	__HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)
	Return the current DMA Stream direct mode error flag. More...

#define	__HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)
	Get the DMA Stream pending flags. More...

#define	__HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__)
	Clear the DMA Stream pending flags. More...

#define	__HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__)
	Enable the specified DMA Stream interrupts. More...

#define	__HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__)
	Disable the specified DMA Stream interrupts. More...

#define	__HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)
	Check whether the specified DMA Stream interrupt is enabled or disabled. More...

#define	__HAL_DMA_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->NDTR = (uint16_t)(__COUNTER__))
	Writes the number of data units to be transferred on the DMA Stream. More...

#define	__HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->NDTR)
	Returns the number of remaining data units in the current DMAy Streamx transfer. More...

Detailed Description

DMA HAL module driver.

Macro Definition Documentation

◆ __HAL_DMA_RESET_HANDLE_STATE

#define __HAL_DMA_RESET_HANDLE_STATE ( __HANDLE__ ) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)

Reset DMA handle state.

Parameters

HANDLE specifies the DMA handle.

Return values

None

◆ __HAL_DMA_GET_FS

#define __HAL_DMA_GET_FS ( __HANDLE__ ) (((__HANDLE__)->Instance->FCR & (DMA_SxFCR_FS)))

Return the current DMA Stream FIFO filled level.

Parameters

HANDLE DMA handle

Return values

The

FIFO filling state.

DMA_FIFOStatus_Less1QuarterFull: when FIFO is less than 1 quarter-full and not empty.
DMA_FIFOStatus_1QuarterFull: if more than 1 quarter-full.
DMA_FIFOStatus_HalfFull: if more than 1 half-full.
DMA_FIFOStatus_3QuartersFull: if more than 3 quarters-full.
DMA_FIFOStatus_Empty: when FIFO is empty
DMA_FIFOStatus_Full: when FIFO is full

◆ __HAL_DMA_ENABLE

#define __HAL_DMA_ENABLE ( __HANDLE__ ) ((__HANDLE__)->Instance->CR |= DMA_SxCR_EN)

Enable the specified DMA Stream.

Parameters

HANDLE DMA handle

Return values

None

◆ __HAL_DMA_DISABLE

#define __HAL_DMA_DISABLE ( __HANDLE__ ) ((__HANDLE__)->Instance->CR &= ~DMA_SxCR_EN)

Disable the specified DMA Stream.

Parameters

HANDLE DMA handle

Return values

None

◆ __HAL_DMA_GET_TC_FLAG_INDEX

#define __HAL_DMA_GET_TC_FLAG_INDEX ( __HANDLE__ )

Value:

(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TCIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TCIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TCIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TCIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TCIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TCIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TCIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TCIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TCIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TCIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TCIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TCIF2_6 :\
   DMA_FLAG_TCIF3_7)

Return the current DMA Stream transfer complete flag.

Parameters

HANDLE DMA handle

Return values

The	specified transfer complete flag index.

◆ __HAL_DMA_GET_HT_FLAG_INDEX

#define __HAL_DMA_GET_HT_FLAG_INDEX ( __HANDLE__ )

Value:

(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_HTIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_HTIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_HTIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_HTIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_HTIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_HTIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_HTIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_HTIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_HTIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_HTIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_HTIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_HTIF2_6 :\
   DMA_FLAG_HTIF3_7)

Return the current DMA Stream half transfer complete flag.

Parameters

HANDLE DMA handle

Return values

The	specified half transfer complete flag index.

◆ __HAL_DMA_GET_TE_FLAG_INDEX

#define __HAL_DMA_GET_TE_FLAG_INDEX ( __HANDLE__ )

Value:

(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_TEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_TEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_TEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_TEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_TEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_TEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_TEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_TEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_TEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_TEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_TEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_TEIF2_6 :\
   DMA_FLAG_TEIF3_7)

Return the current DMA Stream transfer error flag.

Parameters

HANDLE DMA handle

Return values

The	specified transfer error flag index.

◆ __HAL_DMA_GET_FE_FLAG_INDEX

#define __HAL_DMA_GET_FE_FLAG_INDEX ( __HANDLE__ )

Value:

(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_FEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_FEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_FEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_FEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_FEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_FEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_FEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_FEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_FEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_FEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_FEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_FEIF2_6 :\
   DMA_FLAG_FEIF3_7)

Return the current DMA Stream FIFO error flag.

Parameters

HANDLE DMA handle

Return values

The	specified FIFO error flag index.

◆ __HAL_DMA_GET_DME_FLAG_INDEX

#define __HAL_DMA_GET_DME_FLAG_INDEX ( __HANDLE__ )

Value:

(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream0))? DMA_FLAG_DMEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream0))? DMA_FLAG_DMEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream4))? DMA_FLAG_DMEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream4))? DMA_FLAG_DMEIF0_4 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream1))? DMA_FLAG_DMEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream1))? DMA_FLAG_DMEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream5))? DMA_FLAG_DMEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream5))? DMA_FLAG_DMEIF1_5 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream2))? DMA_FLAG_DMEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream2))? DMA_FLAG_DMEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Stream6))? DMA_FLAG_DMEIF2_6 :\
 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Stream6))? DMA_FLAG_DMEIF2_6 :\
   DMA_FLAG_DMEIF3_7)

Return the current DMA Stream direct mode error flag.

Parameters

HANDLE DMA handle

Return values

The	specified direct mode error flag index.

◆ __HAL_DMA_GET_FLAG

#define __HAL_DMA_GET_FLAG	(	__HANDLE__,
		__FLAG__
	)

Value:

(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HISR & (__FLAG__)) :\
 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LISR & (__FLAG__)) :\
 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HISR & (__FLAG__)) : (DMA1->LISR & (__FLAG__)))

Get the DMA Stream pending flags.

Parameters

<strong>HANDLE</strong>	DMA handle
<strong>FLAG</strong>	Get the specified flag. This parameter can be any combination of the following values: DMA_FLAG_TCIFx: Transfer complete flag. DMA_FLAG_HTIFx: Half transfer complete flag. DMA_FLAG_TEIFx: Transfer error flag. DMA_FLAG_DMEIFx: Direct mode error flag. DMA_FLAG_FEIFx: FIFO error flag. Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.

Return values

The	state of FLAG (SET or RESET).

◆ __HAL_DMA_CLEAR_FLAG

#define __HAL_DMA_CLEAR_FLAG	(	__HANDLE__,
		__FLAG__
	)

Value:

(((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
 ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))

Clear the DMA Stream pending flags.

Parameters

<strong>HANDLE</strong>	DMA handle
<strong>FLAG</strong>	specifies the flag to clear. This parameter can be any combination of the following values: DMA_FLAG_TCIFx: Transfer complete flag. DMA_FLAG_HTIFx: Half transfer complete flag. DMA_FLAG_TEIFx: Transfer error flag. DMA_FLAG_DMEIFx: Direct mode error flag. DMA_FLAG_FEIFx: FIFO error flag. Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Stream flag.

Return values

None

◆ __HAL_DMA_ENABLE_IT

#define __HAL_DMA_ENABLE_IT	(	__HANDLE__,
		__INTERRUPT__
	)

Value:

(((__INTERRUPT__) != DMA_IT_FE)? \

((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR |= (__INTERRUPT__)))

Enable the specified DMA Stream interrupts.

Parameters

<strong>HANDLE</strong>	DMA handle
<strong>INTERRUPT</strong>	specifies the DMA interrupt sources to be enabled or disabled. This parameter can be any combination of the following values: DMA_IT_TC: Transfer complete interrupt mask. DMA_IT_HT: Half transfer complete interrupt mask. DMA_IT_TE: Transfer error interrupt mask. DMA_IT_FE: FIFO error interrupt mask. DMA_IT_DME: Direct mode error interrupt.

Return values

None

◆ __HAL_DMA_DISABLE_IT

#define __HAL_DMA_DISABLE_IT	(	__HANDLE__,
		__INTERRUPT__
	)

Value:

(((__INTERRUPT__) != DMA_IT_FE)? \

((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) : ((__HANDLE__)->Instance->FCR &= ~(__INTERRUPT__)))

Disable the specified DMA Stream interrupts.

Parameters

<strong>HANDLE</strong>	DMA handle
<strong>INTERRUPT</strong>	specifies the DMA interrupt sources to be enabled or disabled. This parameter can be any combination of the following values: DMA_IT_TC: Transfer complete interrupt mask. DMA_IT_HT: Half transfer complete interrupt mask. DMA_IT_TE: Transfer error interrupt mask. DMA_IT_FE: FIFO error interrupt mask. DMA_IT_DME: Direct mode error interrupt.

Return values

None

◆ __HAL_DMA_GET_IT_SOURCE

#define __HAL_DMA_GET_IT_SOURCE	(	__HANDLE__,
		__INTERRUPT__
	)

Value:

(((__INTERRUPT__) != DMA_IT_FE)? \
                                                        ((__HANDLE__)->Instance->CR & (__INTERRUPT__)) : \
                                                        ((__HANDLE__)->Instance->FCR & (__INTERRUPT__)))

Check whether the specified DMA Stream interrupt is enabled or disabled.

Parameters

<strong>HANDLE</strong>	DMA handle
<strong>INTERRUPT</strong>	specifies the DMA interrupt source to check. This parameter can be one of the following values: DMA_IT_TC: Transfer complete interrupt mask. DMA_IT_HT: Half transfer complete interrupt mask. DMA_IT_TE: Transfer error interrupt mask. DMA_IT_FE: FIFO error interrupt mask. DMA_IT_DME: Direct mode error interrupt.

Return values

The	state of DMA_IT.

◆ __HAL_DMA_SET_COUNTER

#define __HAL_DMA_SET_COUNTER	(	__HANDLE__,
		__COUNTER__
	)	((__HANDLE__)->Instance->NDTR = (uint16_t)(__COUNTER__))

Writes the number of data units to be transferred on the DMA Stream.

Parameters

<strong>HANDLE</strong>	DMA handle
<strong>COUNTER</strong>	Number of data units to be transferred (from 0 to 65535) Number of data items depends only on the Peripheral data format.

Note: If Peripheral data format is Bytes: number of data units is equal to total number of bytes to be transferred.; If Peripheral data format is Half-Word: number of data units is equal to total number of bytes to be transferred / 2.; If Peripheral data format is Word: number of data units is equal to total number of bytes to be transferred / 4.

Return values

The	number of remaining data units in the current DMAy Streamx transfer.

◆ __HAL_DMA_GET_COUNTER

#define __HAL_DMA_GET_COUNTER ( __HANDLE__ ) ((__HANDLE__)->Instance->NDTR)

Returns the number of remaining data units in the current DMAy Streamx transfer.

Parameters

HANDLE DMA handle

Return values

The	number of remaining data units in the current DMA Stream transfer.

Modules

Macros

Detailed Description

Macro Definition Documentation

◆ __HAL_DMA_RESET_HANDLE_STATE

◆ __HAL_DMA_GET_FS

◆ __HAL_DMA_ENABLE

◆ __HAL_DMA_DISABLE

◆ __HAL_DMA_GET_TC_FLAG_INDEX

◆ __HAL_DMA_GET_HT_FLAG_INDEX

◆ __HAL_DMA_GET_TE_FLAG_INDEX

◆ __HAL_DMA_GET_FE_FLAG_INDEX

◆ __HAL_DMA_GET_DME_FLAG_INDEX

◆ __HAL_DMA_GET_FLAG

◆ __HAL_DMA_CLEAR_FLAG

◆ __HAL_DMA_ENABLE_IT

◆ __HAL_DMA_DISABLE_IT

◆ __HAL_DMA_GET_IT_SOURCE

◆ __HAL_DMA_SET_COUNTER

◆ __HAL_DMA_GET_COUNTER