ADC Private Macros

Collaboration diagram for ADC Private Macros:

Macros
#define	IS_ADC_MODE(MODE)
#define	IS_ADC_DMA_ACCESS_MODE(MODE)
#define	IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE)
#define	IS_ADC_EXT_INJEC_TRIG(INJTRIG)
#define	IS_ADC_INJECTED_LENGTH(LENGTH)   (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
#define	IS_ADC_INJECTED_RANK(RANK)   (((RANK) >= 1U) && ((RANK) <= 4U))
#define	ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_)   (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_))))
	Set the selected injected Channel rank. More...
#define	ADC_COMMON_REGISTER(__HANDLE__)   ADC1_COMMON
	Defines if the selected ADC is within ADC common register ADC123 or ADC1 if available (ADC2, ADC3 availability depends on STM32 product) More...

Detailed Description

Macro Definition Documentation

IS_ADC_MODE

#define IS_ADC_MODE

(

MODE

)

Value:

(((MODE) == ADC_MODE_INDEPENDENT)                 || \
                           ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)   || \
                           ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)     || \
                           ((MODE) == ADC_DUALMODE_INJECSIMULT)             || \
                           ((MODE) == ADC_DUALMODE_REGSIMULT)               || \
                           ((MODE) == ADC_DUALMODE_INTERL)                  || \
                           ((MODE) == ADC_DUALMODE_ALTERTRIG)               || \
                           ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
                           ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig)   || \
                           ((MODE) == ADC_TRIPLEMODE_INJECSIMULT)           || \
                           ((MODE) == ADC_TRIPLEMODE_REGSIMULT)             || \
                           ((MODE) == ADC_TRIPLEMODE_INTERL)                || \
                           ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))

IS_ADC_DMA_ACCESS_MODE

#define IS_ADC_DMA_ACCESS_MODE

(

MODE

)

Value:

(((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
                                      ((MODE) == ADC_DMAACCESSMODE_1)        || \
                                      ((MODE) == ADC_DMAACCESSMODE_2)        || \
                                      ((MODE) == ADC_DMAACCESSMODE_3))

IS_ADC_EXT_INJEC_TRIG_EDGE

#define IS_ADC_EXT_INJEC_TRIG_EDGE

(

EDGE

)

Value:

(((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE)    || \
                                          ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING)  || \
                                          ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
                                          ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))

IS_ADC_EXT_INJEC_TRIG

#define IS_ADC_EXT_INJEC_TRIG

(

INJTRIG

)

Value:

(((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)  || \
                                        ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
                                        ((INJTRIG) == ADC_INJECTED_SOFTWARE_START))

IS_ADC_INJECTED_LENGTH

#define IS_ADC_INJECTED_LENGTH

(

LENGTH

)

(((LENGTH) >= 1U) && ((LENGTH) <= 4U))

IS_ADC_INJECTED_RANK

#define IS_ADC_INJECTED_RANK

(

RANK

)

(((RANK) >= 1U) && ((RANK) <= 4U))

ADC_JSQR

#define ADC_JSQR	(		_CHANNELNB_,
			_RANKNB_,
			_JSQR_JL_
	)		(((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_))))

Set the selected injected Channel rank.

Parameters

<em>CHANNELNB</em>	Channel number.
<em>RANKNB</em>	Rank number.
<em>JSQR_JL</em>	Sequence length.

Return values

None

ADC_COMMON_REGISTER

#define ADC_COMMON_REGISTER

(

__HANDLE__

)

ADC1_COMMON

Defines if the selected ADC is within ADC common register ADC123 or ADC1 if available (ADC2, ADC3 availability depends on STM32 product)

Parameters

<strong>HANDLE</strong>

ADC handle

Return values

Common

control register ADC123 or ADC1