st25dv64k.c File Reference

#include "st25dv64k.h"
#include <string.h>
#include "cmsis_os.h"
#include "stm32f4xx_hal.h"

Macros
#define	ST25DV64K_RTOS
#define	REG_GPO   0x0000
#define	REG_IT_TIME   0x0001
#define	REG_EH_MODE   0x0002
#define	REG_RF_MNGT   0x0003
#define	REG_RFA1SS   0x0004
#define	REG_ENDA1   0x0005
#define	REG_RFA2SS   0x0006
#define	REG_ENDA2   0x0007
#define	REG_RFA3SS   0x0008
#define	REG_ENDA3   0x0009
#define	REG_RFA4SS   0x000A
#define	REG_I2CSS   0x000B
#define	REG_LOCK_CCFILE   0x000C
#define	REG_MB_MODE   0x000D
#define	REG_MB_WDG   0x000E
#define	REG_LOCK_CFG   0x000F
#define	ADDR_WRITE   0xA6
#define	ADDR_READ   0xA7
#define	ADDR_WRITE_SYS   0xAE
#define	ADDR_READ_SYS   0xAF
#define	BLOCK_DELAY   5
#define	BLOCK_BYTES   4
#define	DELAY   HAL_Delay
#define	st25dv64k_delay   osDelay

Functions
static void	st25dv64k_lock (void)
static void	st25dv64k_unlock (void)
void	st25dv64k_init (void)
uint8_t	st25dv64k_user_read (uint16_t address)
void	st25dv64k_user_write (uint16_t address, uint8_t data)
void	st25dv64k_user_read_bytes (uint16_t address, void *pdata, uint8_t size)
void	st25dv64k_user_write_bytes (uint16_t address, void *pdata, uint8_t size)
uint8_t	st25dv64k_rd_cfg (uint16_t address)
void	st25dv64k_wr_cfg (uint16_t address, uint8_t data)
void	st25dv64k_present_pwd (uint8_t *pwd)

Variables
I2C_HandleTypeDef	hi2c1
uint8_t	st25dv64k_initialised = 0
osSemaphoreId	st25dv64k_sema = 0

Macro Definition Documentation

ST25DV64K_RTOS

#define ST25DV64K_RTOS

REG_GPO

#define REG_GPO   0x0000

REG_IT_TIME

#define REG_IT_TIME   0x0001

REG_EH_MODE

#define REG_EH_MODE   0x0002

REG_RF_MNGT

#define REG_RF_MNGT   0x0003

REG_RFA1SS

#define REG_RFA1SS   0x0004

REG_ENDA1

#define REG_ENDA1   0x0005

REG_RFA2SS

#define REG_RFA2SS   0x0006

REG_ENDA2

#define REG_ENDA2   0x0007

REG_RFA3SS

#define REG_RFA3SS   0x0008

REG_ENDA3

#define REG_ENDA3   0x0009

REG_RFA4SS

#define REG_RFA4SS   0x000A

REG_I2CSS

#define REG_I2CSS   0x000B

REG_LOCK_CCFILE

#define REG_LOCK_CCFILE   0x000C

REG_MB_MODE

#define REG_MB_MODE   0x000D

REG_MB_WDG

#define REG_MB_WDG   0x000E

REG_LOCK_CFG

#define REG_LOCK_CFG   0x000F

ADDR_WRITE

#define ADDR_WRITE   0xA6

ADDR_READ

#define ADDR_READ   0xA7

ADDR_WRITE_SYS

#define ADDR_WRITE_SYS   0xAE

ADDR_READ_SYS

#define ADDR_READ_SYS   0xAF

BLOCK_DELAY

#define BLOCK_DELAY   5

BLOCK_BYTES

#define BLOCK_BYTES   4

DELAY

#define DELAY   HAL_Delay

st25dv64k_delay

#define st25dv64k_delay   osDelay

Function Documentation

st25dv64k_lock()

static void st25dv64k_lock ( void  )

static

                                        {
    if (st25dv64k_sema == 0) {
        osSemaphoreDef(st25dv64kSema);
        st25dv64k_sema = osSemaphoreCreate(osSemaphore(st25dv64kSema), 1);
    }
    osSemaphoreWait(st25dv64k_sema, osWaitForever);
}

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st25dv64k_unlock()

static void st25dv64k_unlock ( void  )

static

                                          {
    osSemaphoreRelease(st25dv64k_sema);
}

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st25dv64k_init()

void st25dv64k_init

(

void

)

                          {
    uint8_t pwd[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
    if (!st25dv64k_initialised) {
        if ((st25dv64k_rd_cfg(REG_ENDA1) != 0x7f)
            && (st25dv64k_rd_cfg(REG_ENDA2) != 0xff)
            && (st25dv64k_rd_cfg(REG_ENDA3) != 0xff)) {
            st25dv64k_present_pwd(0);
            st25dv64k_wr_cfg(REG_ENDA3, 0xFF);
            st25dv64k_wr_cfg(REG_ENDA2, 0xFF);
            st25dv64k_wr_cfg(REG_ENDA1, 0x7F);
            st25dv64k_present_pwd(pwd);
 
            st25dv64k_rd_cfg(REG_ENDA1);
            st25dv64k_rd_cfg(REG_ENDA2);
            st25dv64k_rd_cfg(REG_ENDA3);
        }
        st25dv64k_initialised = 1;
    }
}

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st25dv64k_user_read()

uint8_t st25dv64k_user_read

(

uint16_t

address

)

                                              {
    uint8_t _out[2] = { address >> 8, address & 0xff };
    uint8_t data;
    st25dv64k_lock();
    HAL_I2C_Master_Transmit(&hi2c1, ADDR_WRITE, _out, 2, HAL_MAX_DELAY);
    HAL_I2C_Master_Receive(&hi2c1, ADDR_READ, &data, 1, HAL_MAX_DELAY);
    st25dv64k_unlock();
    return data;
}

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st25dv64k_user_write()

void st25dv64k_user_write	(	uint16_t	address,
		uint8_t	data
	)

                                                          {
    uint8_t _out[3] = { address >> 8, address & 0xff, data };
    st25dv64k_lock();
    HAL_I2C_Master_Transmit(&hi2c1, ADDR_WRITE, _out, 3, HAL_MAX_DELAY);
    DELAY(BLOCK_DELAY);
    st25dv64k_unlock(); // unlock must be here because other threads cannot access eeprom while writing/waiting
}

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st25dv64k_user_read_bytes()

void st25dv64k_user_read_bytes	(	uint16_t	address,
		void *	pdata,
		uint8_t	size
	)

                                                                            {
    uint8_t _out[2] = { address >> 8, address & 0xff };
    st25dv64k_lock();
    HAL_I2C_Master_Transmit(&hi2c1, ADDR_WRITE, _out, 2, HAL_MAX_DELAY);
    HAL_I2C_Master_Receive(&hi2c1, ADDR_READ, pdata, size, HAL_MAX_DELAY);
    st25dv64k_unlock();
}

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st25dv64k_user_write_bytes()

void st25dv64k_user_write_bytes	(	uint16_t	address,
		void *	pdata,
		uint8_t	size
	)

                                                                             {
    uint8_t *p = (uint8_t *)pdata;
    uint8_t _out[6];
    uint8_t block_size;
    st25dv64k_lock();
    while (size) {
        block_size = BLOCK_BYTES - (address % BLOCK_BYTES);
        if (block_size > size)
            block_size = size;
        _out[0] = address >> 8;
        _out[1] = address & 0xff;
        memcpy(_out + 2, p, block_size);
        HAL_I2C_Master_Transmit(&hi2c1, ADDR_WRITE, _out, 2 + block_size, HAL_MAX_DELAY);
        DELAY(BLOCK_DELAY);
        size -= block_size;
        address += block_size;
        p += block_size;
    }
    st25dv64k_unlock(); // unlock must be here because other threads cannot access eeprom while writing/waiting
}

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st25dv64k_rd_cfg()

uint8_t st25dv64k_rd_cfg

(

uint16_t

address

)

                                           {
    uint8_t _out[2] = { address >> 8, address & 0xff };
    uint8_t data;
    st25dv64k_lock();
    HAL_I2C_Master_Transmit(&hi2c1, ADDR_WRITE_SYS, _out, 2, HAL_MAX_DELAY);
    HAL_I2C_Master_Receive(&hi2c1, ADDR_READ_SYS, &data, 1, HAL_MAX_DELAY);
    st25dv64k_unlock();
    return data;
}

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st25dv64k_wr_cfg()

void st25dv64k_wr_cfg	(	uint16_t	address,
		uint8_t	data
	)

                                                      {
    uint8_t _out[3] = { address >> 8, address & 0xff, data };
    st25dv64k_lock();
    HAL_I2C_Master_Transmit(&hi2c1, ADDR_WRITE_SYS, _out, 3, HAL_MAX_DELAY);
    DELAY(BLOCK_DELAY);
    st25dv64k_unlock(); // unlock must be here because other threads cannot access eeprom while writing/waiting
}

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st25dv64k_present_pwd()

void st25dv64k_present_pwd

(

uint8_t *

pwd

)

                                         {
    uint8_t _out[19] = { 0x09, 0x00, 0, 0, 0, 0, 0, 0, 0, 0, 0x09, 0, 0, 0, 0, 0, 0, 0, 0 };
    if (pwd) {
        memcpy(_out + 2, pwd, 8);
        memcpy(_out + 11, pwd, 8);
    }
    st25dv64k_lock();
    HAL_I2C_Master_Transmit(&hi2c1, ADDR_WRITE_SYS, _out, 19, HAL_MAX_DELAY);
    st25dv64k_unlock();
}

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Variable Documentation

hi2c1

I2C_HandleTypeDef hi2c1

st25dv64k_initialised

uint8_t st25dv64k_initialised = 0

st25dv64k_sema

osSemaphoreId st25dv64k_sema = 0