Prusa MINI Firmware overview
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Macros | |
#define | __STM32F4xx_HAL_VERSION_MAIN (0x01U) |
STM32F4xx HAL Driver version number V1.7.4. More... | |
#define | __STM32F4xx_HAL_VERSION_SUB1 (0x07U) |
#define | __STM32F4xx_HAL_VERSION_SUB2 (0x04U) |
#define | __STM32F4xx_HAL_VERSION_RC (0x00U) |
#define | __STM32F4xx_HAL_VERSION |
#define | IDCODE_DEVID_MASK 0x00000FFFU |
#define | SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE) |
#define | MEMRMP_OFFSET SYSCFG_OFFSET |
#define | UFB_MODE_BIT_NUMBER SYSCFG_MEMRMP_UFB_MODE_Pos |
#define | UFB_MODE_BB (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32U) + (UFB_MODE_BIT_NUMBER * 4U)) |
#define | CMPCR_OFFSET (SYSCFG_OFFSET + 0x20U) |
#define | CMP_PD_BIT_NUMBER SYSCFG_CMPCR_CMP_PD_Pos |
#define | CMPCR_CMP_PD_BB (uint32_t)(PERIPH_BB_BASE + (CMPCR_OFFSET * 32U) + (CMP_PD_BIT_NUMBER * 4U)) |
#define | MCHDLYCR_OFFSET (SYSCFG_OFFSET + 0x30U) |
#define | BSCKSEL_BIT_NUMBER SYSCFG_MCHDLYCR_BSCKSEL_Pos |
#define | MCHDLYCR_BSCKSEL_BB (uint32_t)(PERIPH_BB_BASE + (MCHDLYCR_OFFSET * 32U) + (BSCKSEL_BIT_NUMBER * 4U)) |
#define __STM32F4xx_HAL_VERSION_MAIN (0x01U) |
STM32F4xx HAL Driver version number V1.7.4.
[31:24] main version
#define __STM32F4xx_HAL_VERSION_SUB1 (0x07U) |
[23:16] sub1 version
#define __STM32F4xx_HAL_VERSION_SUB2 (0x04U) |
[15:8] sub2 version
#define __STM32F4xx_HAL_VERSION_RC (0x00U) |
[7:0] release candidate
#define __STM32F4xx_HAL_VERSION |
#define IDCODE_DEVID_MASK 0x00000FFFU |
#define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE) |
#define MEMRMP_OFFSET SYSCFG_OFFSET |
#define UFB_MODE_BIT_NUMBER SYSCFG_MEMRMP_UFB_MODE_Pos |
#define UFB_MODE_BB (uint32_t)(PERIPH_BB_BASE + (MEMRMP_OFFSET * 32U) + (UFB_MODE_BIT_NUMBER * 4U)) |
#define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20U) |
#define CMP_PD_BIT_NUMBER SYSCFG_CMPCR_CMP_PD_Pos |
#define CMPCR_CMP_PD_BB (uint32_t)(PERIPH_BB_BASE + (CMPCR_OFFSET * 32U) + (CMP_PD_BIT_NUMBER * 4U)) |
#define MCHDLYCR_OFFSET (SYSCFG_OFFSET + 0x30U) |
#define BSCKSEL_BIT_NUMBER SYSCFG_MCHDLYCR_BSCKSEL_Pos |
#define MCHDLYCR_BSCKSEL_BB (uint32_t)(PERIPH_BB_BASE + (MCHDLYCR_OFFSET * 32U) + (BSCKSEL_BIT_NUMBER * 4U)) |