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37 #ifndef __STM32F4xx_HAL_TIM_EX_H
38 #define __STM32F4xx_HAL_TIM_EX_H
123 #define TIM_TIM2_TIM8_TRGO 0x00000000U
124 #define TIM_TIM2_ETH_PTP 0x00000400U
125 #define TIM_TIM2_USBFS_SOF 0x00000800U
126 #define TIM_TIM2_USBHS_SOF 0x00000C00U
127 #define TIM_TIM5_GPIO 0x00000000U
128 #define TIM_TIM5_LSI 0x00000040U
129 #define TIM_TIM5_LSE 0x00000080U
130 #define TIM_TIM5_RTC 0x000000C0U
131 #define TIM_TIM11_GPIO 0x00000000U
132 #define TIM_TIM11_HSE 0x00000002U
134 #if defined(STM32F413xx) || defined(STM32F423xx)
135 #define TIM_TIM9_TIM3_TRGO 0x10000000U
136 #define TIM_TIM9_LPTIM 0x10000010U
137 #define TIM_TIM5_TIM3_TRGO 0x10000000U
138 #define TIM_TIM5_LPTIM 0x10000008U
139 #define TIM_TIM1_TIM3_TRGO 0x10000000U
140 #define TIM_TIM1_LPTIM 0x10000004U
143 #if defined (STM32F446xx)
144 #define TIM_TIM11_SPDIFRX 0x00000001U
150 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
154 #define TIM_SYSTEMBREAKINPUT_HARDFAULT 0x00000001U
155 #define TIM_SYSTEMBREAKINPUT_PVD 0x00000004U
156 #define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD 0x00000005U
291 #if defined (STM32F446xx)
292 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
293 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
294 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
295 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
296 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
297 ((TIM_REMAP) == TIM_TIM5_LSI)||\
298 ((TIM_REMAP) == TIM_TIM5_LSE)||\
299 ((TIM_REMAP) == TIM_TIM5_RTC)||\
300 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
301 ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\
302 ((TIM_REMAP) == TIM_TIM11_HSE))
303 #elif defined(STM32F413xx) || defined(STM32F423xx)
304 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
305 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
306 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
307 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
308 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
309 ((TIM_REMAP) == TIM_TIM5_LSI)||\
310 ((TIM_REMAP) == TIM_TIM5_LSE)||\
311 ((TIM_REMAP) == TIM_TIM5_RTC)||\
312 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
313 ((TIM_REMAP) == TIM_TIM11_HSE)||\
314 ((TIM_REMAP) == TIM_TIM9_TIM3_TRGO)||\
315 ((TIM_REMAP) == TIM_TIM9_LPTIM)||\
316 ((TIM_REMAP) == TIM_TIM5_TIM3_TRGO)||\
317 ((TIM_REMAP) == TIM_TIM5_LPTIM)||\
318 ((TIM_REMAP) == TIM_TIM1_TIM3_TRGO)||\
319 ((TIM_REMAP) == TIM_TIM1_LPTIM))
321 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
322 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
323 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
324 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
325 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
326 ((TIM_REMAP) == TIM_TIM5_LSI)||\
327 ((TIM_REMAP) == TIM_TIM5_LSE)||\
328 ((TIM_REMAP) == TIM_TIM5_RTC)||\
329 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
330 ((TIM_REMAP) == TIM_TIM11_HSE))
333 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
334 #define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\
335 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\
336 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD))
340 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU)
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
TIM Hall sensor Configuration Structure definition.
Definition: stm32f4xx_hal_tim_ex.h:64
uint32_t BreakState
Definition: stm32f4xx_hal_tim_ex.h:104
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_TIM_StateTypeDef
HAL State structures definition.
Definition: stm32f4xx_hal_tim.h:263
TIM Break and Dead time configuration Structure definition.
Definition: stm32f4xx_hal_tim_ex.h:94
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig)
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
TIM Master configuration Structure definition.
Definition: stm32f4xx_hal_tim_ex.h:83
void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
uint32_t IC1Polarity
Definition: stm32f4xx_hal_tim_ex.h:67
uint32_t IC1Filter
Definition: stm32f4xx_hal_tim_ex.h:73
uint32_t AutomaticOutput
Definition: stm32f4xx_hal_tim_ex.h:108
uint32_t LockLevel
Definition: stm32f4xx_hal_tim_ex.h:100
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:55
uint32_t OffStateIDLEMode
Definition: stm32f4xx_hal_tim_ex.h:98
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
uint32_t IC1Prescaler
Definition: stm32f4xx_hal_tim_ex.h:70
uint32_t DeadTime
Definition: stm32f4xx_hal_tim_ex.h:102
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
DMA handle Structure definition.
Definition: stm32f4xx_hal_dma.h:155
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
uint32_t MasterOutputTrigger
Definition: stm32f4xx_hal_tim_ex.h:84
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
TIM Time Base Handle Structure definition.
Definition: stm32f4xx_hal_tim.h:287
void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
uint32_t BreakPolarity
Definition: stm32f4xx_hal_tim_ex.h:106
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
uint32_t OffStateRunMode
Definition: stm32f4xx_hal_tim_ex.h:96
uint32_t Commutation_Delay
Definition: stm32f4xx_hal_tim_ex.h:76
uint32_t MasterSlaveMode
Definition: stm32f4xx_hal_tim_ex.h:87
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)