Prusa MINI Firmware overview
APB2 Peripheral Clock Enable Disable Status

Get the enable or disable status of the APB2 peripheral clock. More...

Collaboration diagram for APB2 Peripheral Clock Enable Disable Status:

Macros

#define __HAL_RCC_TIM1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) != RESET)
 
#define __HAL_RCC_USART1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
 
#define __HAL_RCC_USART6_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) != RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)
 
#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) == RESET)
 
#define __HAL_RCC_USART1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
 
#define __HAL_RCC_USART6_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) == RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)
 
#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == RESET)
 

Detailed Description

Get the enable or disable status of the APB2 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_TIM1_IS_CLK_ENABLED

#define __HAL_RCC_TIM1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) != RESET)

◆ __HAL_RCC_USART1_IS_CLK_ENABLED

#define __HAL_RCC_USART1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)

◆ __HAL_RCC_USART6_IS_CLK_ENABLED

#define __HAL_RCC_USART6_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) != RESET)

◆ __HAL_RCC_ADC1_IS_CLK_ENABLED

#define __HAL_RCC_ADC1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)

◆ __HAL_RCC_SPI1_IS_CLK_ENABLED

#define __HAL_RCC_SPI1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)

◆ __HAL_RCC_SYSCFG_IS_CLK_ENABLED

#define __HAL_RCC_SYSCFG_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) != RESET)

◆ __HAL_RCC_TIM9_IS_CLK_ENABLED

#define __HAL_RCC_TIM9_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != RESET)

◆ __HAL_RCC_TIM11_IS_CLK_ENABLED

#define __HAL_RCC_TIM11_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != RESET)

◆ __HAL_RCC_TIM1_IS_CLK_DISABLED

#define __HAL_RCC_TIM1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) == RESET)

◆ __HAL_RCC_USART1_IS_CLK_DISABLED

#define __HAL_RCC_USART1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)

◆ __HAL_RCC_USART6_IS_CLK_DISABLED

#define __HAL_RCC_USART6_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) == RESET)

◆ __HAL_RCC_ADC1_IS_CLK_DISABLED

#define __HAL_RCC_ADC1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)

◆ __HAL_RCC_SPI1_IS_CLK_DISABLED

#define __HAL_RCC_SPI1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)

◆ __HAL_RCC_SYSCFG_IS_CLK_DISABLED

#define __HAL_RCC_SYSCFG_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SYSCFGEN)) == RESET)

◆ __HAL_RCC_TIM9_IS_CLK_DISABLED

#define __HAL_RCC_TIM9_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == RESET)

◆ __HAL_RCC_TIM11_IS_CLK_DISABLED

#define __HAL_RCC_TIM11_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == RESET)