Collaboration diagram for ADC Exported Types:

Classes
struct	ADC_InitTypeDef
	Structure definition of ADC and regular group initialization. More...

struct	ADC_ChannelConfTypeDef
	Structure definition of ADC channel for regular group. More...

struct	ADC_AnalogWDGConfTypeDef
	ADC Configuration multi-mode structure definition. More...

struct	ADC_HandleTypeDef
	ADC handle Structure definition. More...

Macros
#define	HAL_ADC_STATE_RESET 0x00000000U
	HAL ADC state machine: ADC states definition (bitfields) More...

#define	HAL_ADC_STATE_READY 0x00000001U

#define	HAL_ADC_STATE_BUSY_INTERNAL 0x00000002U

#define	HAL_ADC_STATE_TIMEOUT 0x00000004U

#define	HAL_ADC_STATE_ERROR_INTERNAL 0x00000010U

#define	HAL_ADC_STATE_ERROR_CONFIG 0x00000020U

#define	HAL_ADC_STATE_ERROR_DMA 0x00000040U

#define	HAL_ADC_STATE_REG_BUSY 0x00000100U

#define	HAL_ADC_STATE_REG_EOC 0x00000200U

#define	HAL_ADC_STATE_REG_OVR 0x00000400U

#define	HAL_ADC_STATE_INJ_BUSY 0x00001000U

#define	HAL_ADC_STATE_INJ_EOC 0x00002000U

#define	HAL_ADC_STATE_AWD1 0x00010000U

#define	HAL_ADC_STATE_AWD2 0x00020000U

#define	HAL_ADC_STATE_AWD3 0x00040000U

#define	HAL_ADC_STATE_MULTIMODE_SLAVE 0x00100000U

Detailed Description

Macro Definition Documentation

◆ HAL_ADC_STATE_RESET

#define HAL_ADC_STATE_RESET 0x00000000U

HAL ADC state machine: ADC states definition (bitfields)

ADC not yet initialized or disabled

◆ HAL_ADC_STATE_READY

#define HAL_ADC_STATE_READY 0x00000001U

ADC peripheral ready for use

◆ HAL_ADC_STATE_BUSY_INTERNAL

#define HAL_ADC_STATE_BUSY_INTERNAL 0x00000002U

ADC is busy to internal process (initialization, calibration)

◆ HAL_ADC_STATE_TIMEOUT

#define HAL_ADC_STATE_TIMEOUT 0x00000004U

TimeOut occurrence

◆ HAL_ADC_STATE_ERROR_INTERNAL

#define HAL_ADC_STATE_ERROR_INTERNAL 0x00000010U

Internal error occurrence

◆ HAL_ADC_STATE_ERROR_CONFIG

#define HAL_ADC_STATE_ERROR_CONFIG 0x00000020U

Configuration error occurrence

◆ HAL_ADC_STATE_ERROR_DMA

#define HAL_ADC_STATE_ERROR_DMA 0x00000040U

DMA error occurrence

◆ HAL_ADC_STATE_REG_BUSY

#define HAL_ADC_STATE_REG_BUSY 0x00000100U

A conversion on group regular is ongoing or can occur (either by continuous mode, external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available))

◆ HAL_ADC_STATE_REG_EOC

#define HAL_ADC_STATE_REG_EOC 0x00000200U

Conversion data available on group regular

◆ HAL_ADC_STATE_REG_OVR

#define HAL_ADC_STATE_REG_OVR 0x00000400U

Overrun occurrence

◆ HAL_ADC_STATE_INJ_BUSY

#define HAL_ADC_STATE_INJ_BUSY 0x00001000U

A conversion on group injected is ongoing or can occur (either by auto-injection mode, external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available))

◆ HAL_ADC_STATE_INJ_EOC

#define HAL_ADC_STATE_INJ_EOC 0x00002000U

Conversion data available on group injected

◆ HAL_ADC_STATE_AWD1

#define HAL_ADC_STATE_AWD1 0x00010000U

Out-of-window occurrence of analog watchdog 1

◆ HAL_ADC_STATE_AWD2

#define HAL_ADC_STATE_AWD2 0x00020000U

Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 2

◆ HAL_ADC_STATE_AWD3

#define HAL_ADC_STATE_AWD3 0x00040000U

Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 3

◆ HAL_ADC_STATE_MULTIMODE_SLAVE

#define HAL_ADC_STATE_MULTIMODE_SLAVE 0x00100000U

Not available on STM32F4 device: ADC in multimode slave state, controlled by another ADC master (

Classes

Macros