Collaboration diagram for Get Clock source:

Macros
#define	__HAL_RCC_SYSCLK_CONFIG(__RCC_SYSCLKSOURCE__) MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__RCC_SYSCLKSOURCE__))
	Macro to configure the system clock source. More...

#define	__HAL_RCC_GET_SYSCLK_SOURCE() (RCC->CFGR & RCC_CFGR_SWS)
	Macro to get the clock source used as system clock. More...

#define	__HAL_RCC_GET_PLL_OSCSOURCE() ((uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC))
	Macro to get the oscillator used as PLL clock source. More...

Detailed Description

Macro Definition Documentation

#define __HAL_RCC_SYSCLK_CONFIG ( __RCC_SYSCLKSOURCE__ ) MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__RCC_SYSCLKSOURCE__))

Macro to configure the system clock source.

Parameters

<strong>RCC_SYSCLKSOURCE</strong>

specifies the system clock source. This parameter can be one of the following values:

RCC_SYSCLKSOURCE_HSI: HSI oscillator is used as system clock source.
RCC_SYSCLKSOURCE_HSE: HSE oscillator is used as system clock source.
RCC_SYSCLKSOURCE_PLLCLK: PLL output is used as system clock source.
RCC_SYSCLKSOURCE_PLLRCLK: PLLR output is used as system clock source. This parameter is available only for STM32F446xx devices.

#define __HAL_RCC_GET_SYSCLK_SOURCE ( ) (RCC->CFGR & RCC_CFGR_SWS)

Macro to get the clock source used as system clock.

Return values

The

clock source used as system clock. The returned value can be one of the following:

RCC_SYSCLKSOURCE_STATUS_HSI: HSI used as system clock.
RCC_SYSCLKSOURCE_STATUS_HSE: HSE used as system clock.
RCC_SYSCLKSOURCE_STATUS_PLLCLK: PLL used as system clock.
RCC_SYSCLKSOURCE_STATUS_PLLRCLK: PLLR used as system clock. This parameter is available only for STM32F446xx devices.

#define __HAL_RCC_GET_PLL_OSCSOURCE ( ) ((uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC))

Macro to get the oscillator used as PLL clock source.

Return values

The	oscillator used as PLL clock source. The returned value can be one of the following: RCC_PLLSOURCE_HSI: HSI oscillator is used as PLL clock source. RCC_PLLSOURCE_HSE: HSE oscillator is used as PLL clock source.