stm32f4xx_ll_cortex.h File Reference

Header file of CORTEX LL module. More...

#include "stm32f4xx.h"

Go to the source code of this file.

Macros
#define	LL_SYSTICK_CLKSOURCE_HCLK_DIV8   0x00000000U
#define	LL_SYSTICK_CLKSOURCE_HCLK   SysTick_CTRL_CLKSOURCE_Msk
#define	LL_HANDLER_FAULT_USG   SCB_SHCSR_USGFAULTENA_Msk
#define	LL_HANDLER_FAULT_BUS   SCB_SHCSR_BUSFAULTENA_Msk
#define	LL_HANDLER_FAULT_MEM   SCB_SHCSR_MEMFAULTENA_Msk

Functions
__STATIC_INLINE uint32_t	LL_SYSTICK_IsActiveCounterFlag (void)
	This function checks if the Systick counter flag is active or not. More...
__STATIC_INLINE void	LL_SYSTICK_SetClkSource (uint32_t Source)
	Configures the SysTick clock source @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_SetClkSource. More...
__STATIC_INLINE uint32_t	LL_SYSTICK_GetClkSource (void)
	Get the SysTick clock source @rmtoll STK_CTRL CLKSOURCE LL_SYSTICK_GetClkSource. More...
__STATIC_INLINE void	LL_SYSTICK_EnableIT (void)
	Enable SysTick exception request @rmtoll STK_CTRL TICKINT LL_SYSTICK_EnableIT. More...
__STATIC_INLINE void	LL_SYSTICK_DisableIT (void)
	Disable SysTick exception request @rmtoll STK_CTRL TICKINT LL_SYSTICK_DisableIT. More...
__STATIC_INLINE uint32_t	LL_SYSTICK_IsEnabledIT (void)
	Checks if the SYSTICK interrupt is enabled or disabled. @rmtoll STK_CTRL TICKINT LL_SYSTICK_IsEnabledIT. More...
__STATIC_INLINE void	LL_LPM_EnableSleep (void)
	Processor uses sleep as its low power mode @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep. More...
__STATIC_INLINE void	LL_LPM_EnableDeepSleep (void)
	Processor uses deep sleep as its low power mode @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep. More...
__STATIC_INLINE void	LL_LPM_EnableSleepOnExit (void)
	Configures sleep-on-exit when returning from Handler mode to Thread mode. More...
__STATIC_INLINE void	LL_LPM_DisableSleepOnExit (void)
	Do not sleep when returning to Thread mode. @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit. More...
__STATIC_INLINE void	LL_LPM_EnableEventOnPend (void)
	Enabled events and all interrupts, including disabled interrupts, can wakeup the processor. @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend. More...
__STATIC_INLINE void	LL_LPM_DisableEventOnPend (void)
	Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend. More...
__STATIC_INLINE void	LL_HANDLER_EnableFault (uint32_t Fault)
	Enable a fault in System handler control register (SHCSR) @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_EnableFault. More...
__STATIC_INLINE void	LL_HANDLER_DisableFault (uint32_t Fault)
	Disable a fault in System handler control register (SHCSR) @rmtoll SCB_SHCSR MEMFAULTENA LL_HANDLER_DisableFault. More...
__STATIC_INLINE uint32_t	LL_CPUID_GetImplementer (void)
	Get Implementer code @rmtoll SCB_CPUID IMPLEMENTER LL_CPUID_GetImplementer. More...
__STATIC_INLINE uint32_t	LL_CPUID_GetVariant (void)
	Get Variant number (The r value in the rnpn product revision identifier) @rmtoll SCB_CPUID VARIANT LL_CPUID_GetVariant. More...
__STATIC_INLINE uint32_t	LL_CPUID_GetConstant (void)
	Get Constant number @rmtoll SCB_CPUID ARCHITECTURE LL_CPUID_GetConstant. More...
__STATIC_INLINE uint32_t	LL_CPUID_GetParNo (void)
	Get Part number @rmtoll SCB_CPUID PARTNO LL_CPUID_GetParNo. More...
__STATIC_INLINE uint32_t	LL_CPUID_GetRevision (void)
	Get Revision number (The p value in the rnpn product revision identifier, indicates patch release) @rmtoll SCB_CPUID REVISION LL_CPUID_GetRevision. More...

Detailed Description

Header file of CORTEX LL module.

Author

MCD Application Team

==============================================================================
                   ##### How to use this driver #####
==============================================================================
  [..]
  The LL CORTEX driver contains a set of generic APIs that can be
  used by user:
    (+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick
        functions
    (+) Low power mode configuration (SCB register of Cortex-MCU)
    (+) MPU API to configure and enable regions
        (MPU services provided only on some devices)
    (+) API to access to MCU info (CPUID register)
    (+) API to enable fault handler (SHCSR accesses)

Attention

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