Prusa MINI Firmware overview
stm32f4xx_hal_adc_ex.h
Go to the documentation of this file.
1 /**
2  ******************************************************************************
3  * @file stm32f4xx_hal_adc_ex.h
4  * @author MCD Application Team
5  * @brief Header file of ADC HAL module.
6  ******************************************************************************
7  * @attention
8  *
9  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10  *
11  * Redistribution and use in source and binary forms, with or without modification,
12  * are permitted provided that the following conditions are met:
13  * 1. Redistributions of source code must retain the above copyright notice,
14  * this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright notice,
16  * this list of conditions and the following disclaimer in the documentation
17  * and/or other materials provided with the distribution.
18  * 3. Neither the name of STMicroelectronics nor the names of its contributors
19  * may be used to endorse or promote products derived from this software
20  * without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  *
33  ******************************************************************************
34  */
35 
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_ADC_EX_H
38 #define __STM32F4xx_ADC_EX_H
39 
40 #ifdef __cplusplus
41  extern "C" {
42 #endif
43 
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx_hal_def.h"
46 
47 /** @addtogroup STM32F4xx_HAL_Driver
48  * @{
49  */
50 
51 /** @addtogroup ADCEx
52  * @{
53  */
54 
55 /* Exported types ------------------------------------------------------------*/
56 /** @defgroup ADCEx_Exported_Types ADC Exported Types
57  * @{
58  */
59 
60 /**
61  * @brief ADC Configuration injected Channel structure definition
62  * @note Parameters of this structure are shared within 2 scopes:
63  * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
64  * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
65  * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
66  * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
67  * ADC state can be either:
68  * - For all parameters: ADC disabled
69  * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group.
70  * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group.
71  */
72 typedef struct
73 {
74  uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
75  This parameter can be a value of @ref ADC_channels
76  Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
77  uint32_t InjectedRank; /*!< Rank in the injected group sequencer
78  This parameter must be a value of @ref ADCEx_injected_rank
79  Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
80  uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
81  Unit: ADC clock cycles
82  Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
83  This parameter can be a value of @ref ADC_sampling_times
84  Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
85  If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
86  Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
87  sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
88  Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
89  uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
90  Offset value must be a positive number.
91  Depending of ADC resolution selected (12, 10, 8 or 6 bits),
92  this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
93  uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
94  To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
95  This parameter must be a number between Min_Data = 1 and Max_Data = 4.
96  Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
97  configure a channel on injected group can impact the configuration of other channels previously set. */
98  uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
99  Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
100  Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
101  This parameter can be set to ENABLE or DISABLE.
102  Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
103  Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
104  configure a channel on injected group can impact the configuration of other channels previously set. */
105  uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
106  This parameter can be set to ENABLE or DISABLE.
107  Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
108  Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
109  Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
110  To maintain JAUTO always enabled, DMA must be configured in circular mode.
111  Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
112  configure a channel on injected group can impact the configuration of other channels previously set. */
113  uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
114  If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
115  If set to external trigger source, triggering is on event rising edge.
116  This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected
117  Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
118  If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
119  Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
120  configure a channel on injected group can impact the configuration of other channels previously set. */
121  uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group.
122  This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected.
123  If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded.
124  Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
125  configure a channel on injected group can impact the configuration of other channels previously set. */
127 
128 /**
129  * @brief ADC Configuration multi-mode structure definition
130  */
131 typedef struct
132 {
133  uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
134  This parameter can be a value of @ref ADCEx_Common_mode */
135  uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
136  This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
137  uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
138  This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
140 
141 /**
142  * @}
143  */
144 
145 /* Exported constants --------------------------------------------------------*/
146 /** @defgroup ADCEx_Exported_Constants ADC Exported Constants
147  * @{
148  */
149 
150 /** @defgroup ADCEx_Common_mode ADC Common Mode
151  * @{
152  */
153 #define ADC_MODE_INDEPENDENT 0x00000000U
154 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
155 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
156 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
157 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
158 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
159 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
160 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
161 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
162 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
163 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
164 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
165 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
166 /**
167  * @}
168  */
169 
170 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
171  * @{
172  */
173 #define ADC_DMAACCESSMODE_DISABLED 0x00000000U /*!< DMA mode disabled */
174 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
175 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
176 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
177 /**
178  * @}
179  */
180 
181 /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
182  * @{
183  */
184 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE 0x00000000U
185 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
186 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
187 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
188 /**
189  * @}
190  */
191 
192 /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
193  * @{
194  */
195 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 0x00000000U
196 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
197 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
198 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
199 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
200 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
201 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
202 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
203 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
204 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
205 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
206 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
207 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
208 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
209 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
210 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
211 #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1U)
212 /**
213  * @}
214  */
215 
216 /** @defgroup ADCEx_injected_rank ADC Injected Rank
217  * @{
218  */
219 #define ADC_INJECTED_RANK_1 0x00000001U
220 #define ADC_INJECTED_RANK_2 0x00000002U
221 #define ADC_INJECTED_RANK_3 0x00000003U
222 #define ADC_INJECTED_RANK_4 0x00000004U
223 /**
224  * @}
225  */
226 
227 /** @defgroup ADCEx_channels ADC Specific Channels
228  * @{
229  */
230 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
231  defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
232  defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
233  defined(STM32F412Cx)
234 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
235 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412Zx ||
236  STM32F412Vx || STM32F412Rx || STM32F412Cx */
237 
238 #if defined(STM32F413xx) || defined(STM32F423xx)
239 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18)
240 #endif /* STM32F413xx || STM32F423xx */
241 
242 #if defined(STM32F411xE) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
243  defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
244 #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT 0x10000000U /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
245 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
246 #endif /* STM32F411xE || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
247 /**
248  * @}
249  */
250 
251 
252 /**
253  * @}
254  */
255 
256 /* Exported macro ------------------------------------------------------------*/
257 /** @defgroup ADC_Exported_Macros ADC Exported Macros
258  * @{
259  */
260 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
261 /**
262  * @brief Disable internal path of ADC channel Vbat
263  * @note Use case of this macro:
264  * On devices STM32F42x and STM32F43x, ADC internal channels
265  * Vbat and VrefInt share the same internal path, only
266  * one of them can be enabled.This macro is to be used when ADC
267  * channels Vbat and VrefInt are selected, and must be called
268  * before starting conversion of ADC channel VrefInt in order
269  * to disable ADC channel Vbat.
270  * @retval None
271  */
272 #define __HAL_ADC_PATH_INTERNAL_VBAT_DISABLE() (ADC->CCR &= ~(ADC_CCR_VBATE))
273 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
274 /**
275  * @}
276  */
277 
278 /* Exported functions --------------------------------------------------------*/
279 /** @addtogroup ADCEx_Exported_Functions
280  * @{
281  */
282 
283 /** @addtogroup ADCEx_Exported_Functions_Group1
284  * @{
285  */
286 
287 /* I/O operation functions ******************************************************/
293 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
294 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
298 
299 /* Peripheral Control functions *************************************************/
302 
303 /**
304  * @}
305  */
306 
307 /**
308  * @}
309  */
310 /* Private types -------------------------------------------------------------*/
311 /* Private variables ---------------------------------------------------------*/
312 /* Private constants ---------------------------------------------------------*/
313 /** @defgroup ADCEx_Private_Constants ADC Private Constants
314  * @{
315  */
316 
317 /**
318  * @}
319  */
320 
321 /* Private macros ------------------------------------------------------------*/
322 /** @defgroup ADCEx_Private_Macros ADC Private Macros
323  * @{
324  */
325 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
326  defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
327  defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
328  defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
329 #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18)
330 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE ||
331  STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
332 
333 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
334  defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
335 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
336  ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
337 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
338 
339 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
340  ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
341  ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
342  ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
343  ((MODE) == ADC_DUALMODE_REGSIMULT) || \
344  ((MODE) == ADC_DUALMODE_INTERL) || \
345  ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
346  ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
347  ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
348  ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
349  ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
350  ((MODE) == ADC_TRIPLEMODE_INTERL) || \
351  ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
352 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
353  ((MODE) == ADC_DMAACCESSMODE_1) || \
354  ((MODE) == ADC_DMAACCESSMODE_2) || \
355  ((MODE) == ADC_DMAACCESSMODE_3))
356 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
357  ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
358  ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
359  ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
360 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
361  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
362  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
363  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
364  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
365  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
366  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
367  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
368  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
369  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
370  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
371  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
372  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
373  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
374  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
375  ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
376  ((INJTRIG) == ADC_INJECTED_SOFTWARE_START))
377 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
378 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 1U) && ((RANK) <= 4U))
379 
380 /**
381  * @brief Set the selected injected Channel rank.
382  * @param _CHANNELNB_ Channel number.
383  * @param _RANKNB_ Rank number.
384  * @param _JSQR_JL_ Sequence length.
385  * @retval None
386  */
387 #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_))))
388 
389 /**
390  * @brief Defines if the selected ADC is within ADC common register ADC123 or ADC1
391  * if available (ADC2, ADC3 availability depends on STM32 product)
392  * @param __HANDLE__ ADC handle
393  * @retval Common control register ADC123 or ADC1
394  */
395 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F429xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
396 #define ADC_COMMON_REGISTER(__HANDLE__) ADC123_COMMON
397 #else
398 #define ADC_COMMON_REGISTER(__HANDLE__) ADC1_COMMON
399 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx || STM32F427xx || STM32F429xx || STM32F437xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
400 /**
401  * @}
402  */
403 
404 /* Private functions ---------------------------------------------------------*/
405 /** @defgroup ADCEx_Private_Functions ADC Private Functions
406  * @{
407  */
408 
409 /**
410  * @}
411  */
412 
413 /**
414  * @}
415  */
416 
417 /**
418  * @}
419  */
420 
421 #ifdef __cplusplus
422 }
423 #endif
424 
425 #endif /*__STM32F4xx_ADC_EX_H */
426 
427 
428 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ADC_InjectionConfTypeDef::InjectedNbrOfConversion
uint32_t InjectedNbrOfConversion
Definition: stm32f4xx_hal_adc_ex.h:93
HAL_ADCEx_InjectedStart
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc)
HAL_ADCEx_InjectedConfigChannel
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef *sConfigInjected)
stm32f4xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
ADC_MultiModeTypeDef::Mode
uint32_t Mode
Definition: stm32f4xx_hal_adc_ex.h:133
HAL_ADCEx_InjectedStop_IT
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc)
HAL_ADCEx_InjectedGetValue
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef *hadc, uint32_t InjectedRank)
HAL_ADCEx_InjectedStop
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc)
HAL_ADCEx_InjectedPollForConversion
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
HAL_ADCEx_MultiModeConfigChannel
HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode)
ADC_InjectionConfTypeDef::InjectedDiscontinuousConvMode
uint32_t InjectedDiscontinuousConvMode
Definition: stm32f4xx_hal_adc_ex.h:98
ADC_MultiModeTypeDef::TwoSamplingDelay
uint32_t TwoSamplingDelay
Definition: stm32f4xx_hal_adc_ex.h:137
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f4xx_hal_def.h:55
ADC_InjectionConfTypeDef::InjectedRank
uint32_t InjectedRank
Definition: stm32f4xx_hal_adc_ex.h:77
HAL_ADCEx_MultiModeStop_DMA
HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc)
ADC_InjectionConfTypeDef::InjectedSamplingTime
uint32_t InjectedSamplingTime
Definition: stm32f4xx_hal_adc_ex.h:80
ADC_HandleTypeDef
ADC handle Structure definition.
Definition: stm32f4xx_hal_adc.h:208
ADC_InjectionConfTypeDef::InjectedOffset
uint32_t InjectedOffset
Definition: stm32f4xx_hal_adc_ex.h:89
ADC_MultiModeTypeDef::DMAAccessMode
uint32_t DMAAccessMode
Definition: stm32f4xx_hal_adc_ex.h:135
ADC_InjectionConfTypeDef::ExternalTrigInjecConvEdge
uint32_t ExternalTrigInjecConvEdge
Definition: stm32f4xx_hal_adc_ex.h:121
ADC_InjectionConfTypeDef::InjectedChannel
uint32_t InjectedChannel
Definition: stm32f4xx_hal_adc_ex.h:74
ADC_InjectionConfTypeDef
ADC Configuration injected Channel structure definition.
Definition: stm32f4xx_hal_adc_ex.h:72
HAL_ADCEx_InjectedConvCpltCallback
void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc)
HAL_ADCEx_MultiModeStart_DMA
HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length)
HAL_ADCEx_MultiModeGetValue
uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc)
ADC_InjectionConfTypeDef::ExternalTrigInjecConv
uint32_t ExternalTrigInjecConv
Definition: stm32f4xx_hal_adc_ex.h:113
ADC_MultiModeTypeDef
ADC Configuration multi-mode structure definition.
Definition: stm32f4xx_hal_adc_ex.h:131
HAL_ADCEx_InjectedStart_IT
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc)
ADC_InjectionConfTypeDef::AutoInjectedConv
uint32_t AutoInjectedConv
Definition: stm32f4xx_hal_adc_ex.h:105