28 #include "../HAL/shared/Marduino.h"
31 #define FORCE_INLINE inline __attribute__((always_inline))
34 #define nop __asm__ volatile ("nop") // NOP for timing
69 return g_APinDescription[pin].pPort->PIO_PDSR & g_APinDescription[pin].ulPin;
79 g_APinDescription[pin].pPort->PIO_SODR = g_APinDescription[pin].ulPin;
81 g_APinDescription[pin].pPort->PIO_CODR = g_APinDescription[pin].ulPin;
84 #endif // !CORE_TEENSY
93 #include <util/atomic.h>
106 #if defined(__AVR_ATmega168__) || defined(__AVR_ATmega168P__) || defined(__AVR_ATmega328P__)
110 {&DDRD, &PIND, &
PORTD, 0},
111 {&DDRD, &PIND, &
PORTD, 1},
112 {&DDRD, &PIND, &
PORTD, 2},
113 {&DDRD, &PIND, &
PORTD, 3},
114 {&DDRD, &PIND, &
PORTD, 4},
115 {&DDRD, &PIND, &
PORTD, 5},
116 {&DDRD, &PIND, &
PORTD, 6},
117 {&DDRD, &PIND, &
PORTD, 7},
118 {&DDRB, &PINB, &
PORTB, 0},
119 {&DDRB, &PINB, &
PORTB, 1},
120 {&DDRB, &PINB, &
PORTB, 2},
121 {&DDRB, &PINB, &
PORTB, 3},
122 {&DDRB, &PINB, &
PORTB, 4},
123 {&DDRB, &PINB, &
PORTB, 5},
124 {&DDRC, &PINC, &
PORTC, 0},
125 {&DDRC, &PINC, &
PORTC, 1},
126 {&DDRC, &PINC, &
PORTC, 2},
127 {&DDRC, &PINC, &
PORTC, 3},
128 {&DDRC, &PINC, &
PORTC, 4},
129 {&DDRC, &PINC, &
PORTC, 5}
132 #elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
136 {&DDRE, &PINE, &
PORTE, 0},
137 {&DDRE, &PINE, &
PORTE, 1},
138 {&DDRE, &PINE, &
PORTE, 4},
139 {&DDRE, &PINE, &
PORTE, 5},
140 {&DDRG, &PING, &
PORTG, 5},
141 {&DDRE, &PINE, &
PORTE, 3},
142 {&DDRH, &PINH, &PORTH, 3},
143 {&DDRH, &PINH, &PORTH, 4},
144 {&DDRH, &PINH, &PORTH, 5},
145 {&DDRH, &PINH, &PORTH, 6},
146 {&DDRB, &PINB, &
PORTB, 4},
147 {&DDRB, &PINB, &
PORTB, 5},
148 {&DDRB, &PINB, &
PORTB, 6},
149 {&DDRB, &PINB, &
PORTB, 7},
150 {&DDRJ, &PINJ, &PORTJ, 1},
151 {&DDRJ, &PINJ, &PORTJ, 0},
152 {&DDRH, &PINH, &PORTH, 1},
153 {&DDRH, &PINH, &PORTH, 0},
154 {&DDRD, &PIND, &
PORTD, 3},
155 {&DDRD, &PIND, &
PORTD, 2},
156 {&DDRD, &PIND, &
PORTD, 1},
157 {&DDRD, &PIND, &
PORTD, 0},
158 {&DDRA, &PINA, &
PORTA, 0},
159 {&DDRA, &PINA, &
PORTA, 1},
160 {&DDRA, &PINA, &
PORTA, 2},
161 {&DDRA, &PINA, &
PORTA, 3},
162 {&DDRA, &PINA, &
PORTA, 4},
163 {&DDRA, &PINA, &
PORTA, 5},
164 {&DDRA, &PINA, &
PORTA, 6},
165 {&DDRA, &PINA, &
PORTA, 7},
166 {&DDRC, &PINC, &
PORTC, 7},
167 {&DDRC, &PINC, &
PORTC, 6},
168 {&DDRC, &PINC, &
PORTC, 5},
169 {&DDRC, &PINC, &
PORTC, 4},
170 {&DDRC, &PINC, &
PORTC, 3},
171 {&DDRC, &PINC, &
PORTC, 2},
172 {&DDRC, &PINC, &
PORTC, 1},
173 {&DDRC, &PINC, &
PORTC, 0},
174 {&DDRD, &PIND, &
PORTD, 7},
175 {&DDRG, &PING, &
PORTG, 2},
176 {&DDRG, &PING, &
PORTG, 1},
177 {&DDRG, &PING, &
PORTG, 0},
178 {&DDRL, &PINL, &PORTL, 7},
179 {&DDRL, &PINL, &PORTL, 6},
180 {&DDRL, &PINL, &PORTL, 5},
181 {&DDRL, &PINL, &PORTL, 4},
182 {&DDRL, &PINL, &PORTL, 3},
183 {&DDRL, &PINL, &PORTL, 2},
184 {&DDRL, &PINL, &PORTL, 1},
185 {&DDRL, &PINL, &PORTL, 0},
186 {&DDRB, &PINB, &
PORTB, 3},
187 {&DDRB, &PINB, &
PORTB, 2},
188 {&DDRB, &PINB, &
PORTB, 1},
189 {&DDRB, &PINB, &
PORTB, 0},
190 {&DDRF, &PINF, &
PORTF, 0},
191 {&DDRF, &PINF, &
PORTF, 1},
192 {&DDRF, &PINF, &
PORTF, 2},
193 {&DDRF, &PINF, &
PORTF, 3},
194 {&DDRF, &PINF, &
PORTF, 4},
195 {&DDRF, &PINF, &
PORTF, 5},
196 {&DDRF, &PINF, &
PORTF, 6},
197 {&DDRF, &PINF, &
PORTF, 7},
198 {&DDRK, &PINK, &PORTK, 0},
199 {&DDRK, &PINK, &PORTK, 1},
200 {&DDRK, &PINK, &PORTK, 2},
201 {&DDRK, &PINK, &PORTK, 3},
202 {&DDRK, &PINK, &PORTK, 4},
203 {&DDRK, &PINK, &PORTK, 5},
204 {&DDRK, &PINK, &PORTK, 6},
205 {&DDRK, &PINK, &PORTK, 7},
208 {&DDRG, &PING, &
PORTG, 4},
209 {&DDRG, &PING, &
PORTG, 3},
210 {&DDRJ, &PINJ, &PORTJ, 2},
211 {&DDRJ, &PINJ, &PORTJ, 3},
212 {&DDRJ, &PINJ, &PORTJ, 7},
213 {&DDRJ, &PINJ, &PORTJ, 4},
214 {&DDRJ, &PINJ, &PORTJ, 5},
215 {&DDRJ, &PINJ, &PORTJ, 6},
216 {&DDRE, &PINE, &
PORTE, 2},
217 {&DDRE, &PINE, &
PORTE, 6}
220 #elif defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega1284__) \
221 || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__) \
222 || defined(__AVR_ATmega64__) || defined(__AVR_ATmega32__) \
223 || defined(__AVR_ATmega324__) || defined(__AVR_ATmega16__)
225 #ifdef VARIANT_MIGHTY
229 {&DDRB, &PINB, &
PORTB, 0},
230 {&DDRB, &PINB, &
PORTB, 1},
231 {&DDRB, &PINB, &
PORTB, 2},
232 {&DDRB, &PINB, &
PORTB, 3},
233 {&DDRB, &PINB, &
PORTB, 4},
234 {&DDRB, &PINB, &
PORTB, 5},
235 {&DDRB, &PINB, &
PORTB, 6},
236 {&DDRB, &PINB, &
PORTB, 7},
237 {&DDRD, &PIND, &
PORTD, 0},
238 {&DDRD, &PIND, &
PORTD, 1},
239 {&DDRD, &PIND, &
PORTD, 2},
240 {&DDRD, &PIND, &
PORTD, 3},
241 {&DDRD, &PIND, &
PORTD, 4},
242 {&DDRD, &PIND, &
PORTD, 5},
243 {&DDRD, &PIND, &
PORTD, 6},
244 {&DDRD, &PIND, &
PORTD, 7},
245 {&DDRC, &PINC, &
PORTC, 0},
246 {&DDRC, &PINC, &
PORTC, 1},
247 {&DDRC, &PINC, &
PORTC, 2},
248 {&DDRC, &PINC, &
PORTC, 3},
249 {&DDRC, &PINC, &
PORTC, 4},
250 {&DDRC, &PINC, &
PORTC, 5},
251 {&DDRC, &PINC, &
PORTC, 6},
252 {&DDRC, &PINC, &
PORTC, 7},
253 {&DDRA, &PINA, &
PORTA, 0},
254 {&DDRA, &PINA, &
PORTA, 1},
255 {&DDRA, &PINA, &
PORTA, 2},
256 {&DDRA, &PINA, &
PORTA, 3},
257 {&DDRA, &PINA, &
PORTA, 4},
258 {&DDRA, &PINA, &
PORTA, 5},
259 {&DDRA, &PINA, &
PORTA, 6},
260 {&DDRA, &PINA, &
PORTA, 7}
263 #elif defined(VARIANT_BOBUINO)
267 {&DDRD, &PIND, &
PORTD, 0},
268 {&DDRD, &PIND, &
PORTD, 1},
269 {&DDRD, &PIND, &
PORTD, 2},
270 {&DDRD, &PIND, &
PORTD, 3},
271 {&DDRB, &PINB, &
PORTB, 0},
272 {&DDRB, &PINB, &
PORTB, 1},
273 {&DDRB, &PINB, &
PORTB, 2},
274 {&DDRB, &PINB, &
PORTB, 3},
275 {&DDRD, &PIND, &
PORTD, 5},
276 {&DDRD, &PIND, &
PORTD, 6},
277 {&DDRB, &PINB, &
PORTB, 4},
278 {&DDRB, &PINB, &
PORTB, 5},
279 {&DDRB, &PINB, &
PORTB, 6},
280 {&DDRB, &PINB, &
PORTB, 7},
281 {&DDRA, &PINA, &
PORTA, 7},
282 {&DDRA, &PINA, &
PORTA, 6},
283 {&DDRA, &PINA, &
PORTA, 5},
284 {&DDRA, &PINA, &
PORTA, 4},
285 {&DDRA, &PINA, &
PORTA, 3},
286 {&DDRA, &PINA, &
PORTA, 2},
287 {&DDRA, &PINA, &
PORTA, 1},
288 {&DDRA, &PINA, &
PORTA, 0},
289 {&DDRC, &PINC, &
PORTC, 0},
290 {&DDRC, &PINC, &
PORTC, 1},
291 {&DDRC, &PINC, &
PORTC, 2},
292 {&DDRC, &PINC, &
PORTC, 3},
293 {&DDRC, &PINC, &
PORTC, 4},
294 {&DDRC, &PINC, &
PORTC, 5},
295 {&DDRC, &PINC, &
PORTC, 6},
296 {&DDRC, &PINC, &
PORTC, 7},
297 {&DDRD, &PIND, &
PORTD, 4},
298 {&DDRD, &PIND, &
PORTD, 7}
301 #elif defined(VARIANT_STANDARD)
305 {&DDRB, &PINB, &
PORTB, 0},
306 {&DDRB, &PINB, &
PORTB, 1},
307 {&DDRB, &PINB, &
PORTB, 2},
308 {&DDRB, &PINB, &
PORTB, 3},
309 {&DDRB, &PINB, &
PORTB, 4},
310 {&DDRB, &PINB, &
PORTB, 5},
311 {&DDRB, &PINB, &
PORTB, 6},
312 {&DDRB, &PINB, &
PORTB, 7},
313 {&DDRD, &PIND, &
PORTD, 0},
314 {&DDRD, &PIND, &
PORTD, 1},
315 {&DDRD, &PIND, &
PORTD, 2},
316 {&DDRD, &PIND, &
PORTD, 3},
317 {&DDRD, &PIND, &
PORTD, 4},
318 {&DDRD, &PIND, &
PORTD, 5},
319 {&DDRD, &PIND, &
PORTD, 6},
320 {&DDRD, &PIND, &
PORTD, 7},
321 {&DDRC, &PINC, &
PORTC, 0},
322 {&DDRC, &PINC, &
PORTC, 1},
323 {&DDRC, &PINC, &
PORTC, 2},
324 {&DDRC, &PINC, &
PORTC, 3},
325 {&DDRC, &PINC, &
PORTC, 4},
326 {&DDRC, &PINC, &
PORTC, 5},
327 {&DDRC, &PINC, &
PORTC, 6},
328 {&DDRC, &PINC, &
PORTC, 7},
329 {&DDRA, &PINA, &
PORTA, 7},
330 {&DDRA, &PINA, &
PORTA, 6},
331 {&DDRA, &PINA, &
PORTA, 5},
332 {&DDRA, &PINA, &
PORTA, 4},
333 {&DDRA, &PINA, &
PORTA, 3},
334 {&DDRA, &PINA, &
PORTA, 2},
335 {&DDRA, &PINA, &
PORTA, 1},
336 {&DDRA, &PINA, &
PORTA, 0}
339 #else // !(VARIANT_MIGHTY || VARIANT_BOBUINO || VARIANT_STANDARD)
341 #error Undefined variant 1284, 644, 324, 64, 32
345 #elif defined(__AVR_ATmega32U4__)
351 {&DDRB, &PINB, &
PORTB, 0},
352 {&DDRB, &PINB, &
PORTB, 1},
353 {&DDRB, &PINB, &
PORTB, 2},
354 {&DDRB, &PINB, &
PORTB, 3},
355 {&DDRB, &PINB, &
PORTB, 7},
356 {&DDRD, &PIND, &
PORTD, 0},
357 {&DDRD, &PIND, &
PORTD, 1},
358 {&DDRD, &PIND, &
PORTD, 2},
359 {&DDRD, &PIND, &
PORTD, 3},
360 {&DDRC, &PINC, &
PORTC, 6},
361 {&DDRC, &PINC, &
PORTC, 7},
362 {&DDRD, &PIND, &
PORTD, 6},
363 {&DDRD, &PIND, &
PORTD, 7},
364 {&DDRB, &PINB, &
PORTB, 4},
365 {&DDRB, &PINB, &
PORTB, 5},
366 {&DDRB, &PINB, &
PORTB, 6},
367 {&DDRF, &PINF, &
PORTF, 7},
368 {&DDRF, &PINF, &
PORTF, 6},
369 {&DDRF, &PINF, &
PORTF, 5},
370 {&DDRF, &PINF, &
PORTF, 4},
371 {&DDRF, &PINF, &
PORTF, 1},
372 {&DDRF, &PINF, &
PORTF, 0},
373 {&DDRD, &PIND, &
PORTD, 4},
374 {&DDRD, &PIND, &
PORTD, 5},
375 {&DDRE, &PINE, &
PORTE, 6}
378 #else // !CORE_TEENSY
382 {&DDRD, &PIND, &
PORTD, 2},
383 {&DDRD, &PIND, &
PORTD, 3},
384 {&DDRD, &PIND, &
PORTD, 1},
385 {&DDRD, &PIND, &
PORTD, 0},
386 {&DDRD, &PIND, &
PORTD, 4},
387 {&DDRC, &PINC, &
PORTC, 6},
388 {&DDRD, &PIND, &
PORTD, 7},
389 {&DDRE, &PINE, &
PORTE, 6},
390 {&DDRB, &PINB, &
PORTB, 4},
391 {&DDRB, &PINB, &
PORTB, 5},
392 {&DDRB, &PINB, &
PORTB, 6},
393 {&DDRB, &PINB, &
PORTB, 7},
394 {&DDRD, &PIND, &
PORTD, 6},
395 {&DDRC, &PINC, &
PORTC, 7},
396 {&DDRB, &PINB, &
PORTB, 3},
397 {&DDRB, &PINB, &
PORTB, 1},
398 {&DDRB, &PINB, &
PORTB, 2},
399 {&DDRB, &PINB, &
PORTB, 0},
400 {&DDRF, &PINF, &
PORTF, 7},
401 {&DDRF, &PINF, &
PORTF, 6},
402 {&DDRF, &PINF, &
PORTF, 5},
403 {&DDRF, &PINF, &
PORTF, 4},
404 {&DDRF, &PINF, &
PORTF, 1},
405 {&DDRF, &PINF, &
PORTF, 0},
406 {&DDRD, &PIND, &
PORTD, 4},
407 {&DDRD, &PIND, &
PORTD, 7},
408 {&DDRB, &PINB, &
PORTB, 4},
409 {&DDRB, &PINB, &
PORTB, 5},
410 {&DDRB, &PINB, &
PORTB, 6},
411 {&DDRD, &PIND, &
PORTD, 6}
414 #endif // !CORE_TEENSY
416 #elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
420 {&DDRD, &PIND, &
PORTD, 0},
421 {&DDRD, &PIND, &
PORTD, 1},
422 {&DDRD, &PIND, &
PORTD, 2},
423 {&DDRD, &PIND, &
PORTD, 3},
424 {&DDRD, &PIND, &
PORTD, 4},
425 {&DDRD, &PIND, &
PORTD, 5},
426 {&DDRD, &PIND, &
PORTD, 6},
427 {&DDRD, &PIND, &
PORTD, 7},
428 {&DDRE, &PINE, &
PORTE, 0},
429 {&DDRE, &PINE, &
PORTE, 1},
430 {&DDRC, &PINC, &
PORTC, 0},
431 {&DDRC, &PINC, &
PORTC, 1},
432 {&DDRC, &PINC, &
PORTC, 2},
433 {&DDRC, &PINC, &
PORTC, 3},
434 {&DDRC, &PINC, &
PORTC, 4},
435 {&DDRC, &PINC, &
PORTC, 5},
436 {&DDRC, &PINC, &
PORTC, 6},
437 {&DDRC, &PINC, &
PORTC, 7},
438 {&DDRE, &PINE, &
PORTE, 6},
439 {&DDRE, &PINE, &
PORTE, 7},
440 {&DDRB, &PINB, &
PORTB, 0},
441 {&DDRB, &PINB, &
PORTB, 1},
442 {&DDRB, &PINB, &
PORTB, 2},
443 {&DDRB, &PINB, &
PORTB, 3},
444 {&DDRB, &PINB, &
PORTB, 4},
445 {&DDRB, &PINB, &
PORTB, 5},
446 {&DDRB, &PINB, &
PORTB, 6},
447 {&DDRB, &PINB, &
PORTB, 7},
448 {&DDRA, &PINA, &
PORTA, 0},
449 {&DDRA, &PINA, &
PORTA, 1},
450 {&DDRA, &PINA, &
PORTA, 2},
451 {&DDRA, &PINA, &
PORTA, 3},
452 {&DDRA, &PINA, &
PORTA, 4},
453 {&DDRA, &PINA, &
PORTA, 5},
454 {&DDRA, &PINA, &
PORTA, 6},
455 {&DDRA, &PINA, &
PORTA, 7},
456 {&DDRE, &PINE, &
PORTE, 4},
457 {&DDRE, &PINE, &
PORTE, 5},
458 {&DDRF, &PINF, &
PORTF, 0},
459 {&DDRF, &PINF, &
PORTF, 1},
460 {&DDRF, &PINF, &
PORTF, 2},
461 {&DDRF, &PINF, &
PORTF, 3},
462 {&DDRF, &PINF, &
PORTF, 4},
463 {&DDRF, &PINF, &
PORTF, 5},
464 {&DDRF, &PINF, &
PORTF, 6},
465 {&DDRF, &PINF, &
PORTF, 7}
470 #error "Unknown CPU type for Software SPI"
509 return (*pinMap[pin].pin >> pinMap[pin].
bit) & 1;
521 if (pinMap[pin].pin > (
uint8_t*)0x5F)
524 SBI(*pinMap[pin].pin, pinMap[pin].
bit);
567 template<u
int8_t PinNumber>
656 template<u
int8_t MisoPin, u
int8_t MosiPin, u
int8_t SckPin, u
int8_t Mode = 0>
673 receiveBit(7, &
data);
674 receiveBit(6, &
data);
675 receiveBit(5, &
data);
676 receiveBit(4, &
data);
677 receiveBit(3, &
data);
678 receiveBit(2, &
data);
679 receiveBit(1, &
data);
680 receiveBit(0, &
data);
706 transferBit(7, &rxData, txData);
707 transferBit(6, &rxData, txData);
708 transferBit(5, &rxData, txData);
709 transferBit(4, &rxData, txData);
710 transferBit(3, &rxData, txData);
711 transferBit(2, &rxData, txData);
712 transferBit(1, &rxData, txData);
713 transferBit(0, &rxData, txData);
726 MODE_CPHA(Mode) ? MODE_CPOL(Mode) : !MODE_CPOL(Mode));
734 fastDigitalWrite(SckPin, MODE_CPHA(Mode) ? MODE_CPOL(Mode) : !MODE_CPOL(Mode));
744 MODE_CPHA(Mode) ? MODE_CPOL(Mode) : !MODE_CPOL(Mode));